The present invention relates generally to printed circuit board design and testing, and more particularly to techniques for determining probing locations on a printed circuit board for tester access.
Electronic products typically contain at least one printed circuit board (PCB). A PCB generally includes a number of electronic components that are electrically connected together by electrical paths called “nets” that are formed of various combinations of conductive traces, vias, wires, and solder, to form an operational circuit that performs a given function. A conventional PCB development cycle includes PCB design, test development, and tester fixture development.
Where possible, given the state of the art of available development tools in the market, many steps involved in PCB design, test development and fixture development are automated, either fully or at least partially. For example, large automated industrial CAD development systems have been developed that allow floorplanning, schematic capture, trace routing, design verification, and even test generation. These automated features have significantly improved the time-to-market of an integrated circuit assembly. However, several steps in the PCB development cycle are still performed mainly by manual intervention and iterative effort. For example, as illustrated in FIG. 1, the addition of test pads to the circuit during the PCB design stage and the manual addition of board pushers for push-down top gate fixtures during the fixture development stage have to this point been difficult to automate. The reasons for this are multifold, a better understanding of which will become clearer through a more detailed description of the PCB development process.
During the PCB design stage, a CAD system is typically used to design and lay out the PCB, including schematic capture and component and trace layout of the PCB under development. Prior to completion of the final PCB design, test pads are added to the design to provide tester probing access for all nets used in board testing (such as in-circuit test (ICT)).
Once the design has been captured, routed, and test pads are added, the CAD data files representing the PCB design with test pads inserted are then released for test development. In-Circuit Test (ICT) is a well-known test methodology that includes testing hardware that can probe nets of the PCB through a combination of tester relays, tester interface pins, and custom fixturing. More particularly, FIG. 1 illustrates a portion of a conventional ICT tester environment 200. The tester environment 200 includes an automated tester 210 that implements the test electronics 212, including measurement circuits, relays, control electronics, etc. The tester 210 provides a field of tester interface pins 214, which are arranged in a fixed configuration and may be connected to various measurement circuits within the test electronics 212 by way of electronically controlled relays (not shown). Because the tester interface pin field is a fixed configuration, in order to probe test pads 204 on a PCB under test 202, the PCB 202 is generally mounted in a customized fixture 220 which operates as an adapter between fixed configuration tester interface pins 214 and various test pads 204 on the PCB 202.
The tester fixture 220 includes a probe protection plate 240, standard spring probes 232 whose tips exactly correspond to test pads 204 on the bottom of the PCB under test 202, a top push-down gate 250 which opens and closes by way of a hinge 252, spacers called board pushers 258 mounted in the bottom of the push down gate 250 which limit the deflection of the PCB 202 under vacuum loading, a probe mounting plate 230 in which the spring probes 232 are installed, personality pins 226 which are wired to the spring probes 232, and an alignment plate 222 which aligns the wirewrap tails of the personality pins 226 into a regularly spaced pattern so that they line up with tester interface pins 214 mounted in the tester 210. As known in the art, a spring probe is a standard device, commonly used by the test community, which conducts electrical signals and contains a compression spring and plunger that move relative to the barrel and/or socket when actuated. A solid probe also conducts electrical signals but has no additional parts which move relative to each other during actuation.
During test, the PCB under test 202 is pulled down by vacuum or other known mechanical means so that the test pads 204 on the bottom of the PCB under test 202 contact the tips of the spring probes 232. The sockets of the standard spring probes 232 are wired to personality pins 226, and the alignment plate 222 funnels the long, flexible personality pin tips into a regularly spaced pattern. The tips of personality pins 226 contact the tester interface pins 214 mounted in the tester 210. Once electrical contact between the PCB under test 202 and the tester 210 is established, in-circuit or functional testing may commence.
During the test development stage the CAD data is translated as necessary into native formats of the test platform (i.e., formatted into a format expected by the ICT tester), from which tests are developed. Most of today's PCB testers come with software packages that can automatically generate tests when full access is available. Some testers, for example, the Agilent 3070 In-Circuit Test (ICT) Board Test System, manufactured by Agilent Technologies, Inc. having headquarters in Palo Alto, Calif., also include fixture generation software that automatically generates fixture design files needed to build an ICT fixture. Fixture design files typically include specifications for the board outline coordinates, tooling pin holes and locations, drill information, probe and socket insertion information, and wiring information. The design of a fixture requirements consideration of certain criteria such as maximum force per square unit applied to the board, maximum board flex thresholds, etc. To meet these criteria, the fixture builder must consider the layout of the probes 232. An average fixture may include 3000 to 4000 probes 232, each exerting, for example, 8 ounces of force against the bottom of the PCB 202 during test. This works out to nearly a ton of force pushing upward against the PCB 202. If the counteracting forces of the probes and board pushers are unevenly distributed across the entire board, the PCB will flex and may cause faulty or even damaging results. Accordingly, most ICT fixtures include a top push-down gate 250 with push-down spacers, herein called board pushers 258, to counteract the fixture probe forces as shown in FIG. 2. However, even in a fixture that implements a top push-down gate 250, if the counteracting forces of the probes and board pushers are not evenly distributed across the entire board, the PCB will flex and may cause stresses that can damage solder connections or even the components themselves. Accordingly, the fixture designer must balance the board by strategically positioning the board pushers in the fixture to counteract the forces of the fixture probes so as to eliminate or significantly reduce board flex. However, there is no existing automated technique for determining locations of board pushers in a fixture. Instead, the gate and board pusher layout is usually designed manually after importing the fixture files resulting from the PCB design into a CAD tool (typically AutoCAD). Board pusher layout can be time-consuming, and since done manually, may not truly minimize board flex.
In addition to the limitation of manual addition of test pads to the PCB design, today's techniques for adding test pads or probing locations to the PCB design are also limited in that they treat the problems of determining probing locations and minimizing board flex as independent problems, first determining probing locations on the board and then, based on the determined probing locations, determining locations of board pushers for counteracting the forces of the probes on the board in places of maximum deflection. However, a person skilled in the art will recognize that the placement of fixture probes and the placement of board pushers are highly correlated problems. That is, since both the probes and the board pushers directly contribute to the force components applied to the board but are in principle placed by design to counteract the forces of one another as much as possible, the locations of the board pushers are highly correlated with the positions of the probing locations. Accordingly, it would be desirable to have a technique that operates to globally minimize board flex (and as a side benefit, the number of board pushers required in a fixture) by iteratively, automatically, and intelligently determining probing locations in a PCB design with a view towards meeting the requirements of the associated fixture design, in particular the requirement for minimizing board flex.
The addition of conventional test pads to the design is typically a manual process. Conventional test pads are implemented as extensions of traces on the exposed trace layers in that they lie in the same plane as one of the exposed trace layers and are formed integrally with traces on the exposed trace layer using the same trace material. Conventional test pads are typically round, square, or some other planar geometric shape and have a surface area large enough to accommodate a probe head so that when the PCB is probed at the test pad, the probe does not contact other traces or components on the PCB. Furthermore, the size of a test pad is also determined by pointing errors in probe placement that may cause lateral offsets. Thus, a test pad may be somewhat larger than the probe head itself, to assure a good probability of hitting it. Because conventional test pads occupy area on the trace layer, the addition of test pads to the PCB design often require rerouting of nets of the PCB design. The addition of test pads to the design using conventional techniques also carries risks in adversely affecting surrounding circuitry or changing the transmission line characteristics of the traces over which high-speed signals are communicated. Accordingly, whenever a test pad is added to the PCB design using conventional techniques, the effects of the design change must be either calculated or simulated in order to ensure that the location of the test pad and its associated changes to the design do not adversely affect circuit operation. The addition of test pads to the design using conventional techniques can therefore be iterative in nature in order to find an acceptable layout. All of the above amounts to a considerably time consuming process which is, in addition, expensive also in terms of board real estate. Accordingly, the addition of multiple possible alternative test pads for any significant number of nets of a PCB design using conventional techniques is rare, and the feasibility of minimizing board flex based on selection of probing locations is therefore low.
More recently, novel test access structures, referred to herein as “bead probes” are being used as test access structures in place of conventional test pads. Bead probes are implemented along the z-axis of a PCB board having metal and dielectric layers oriented in the x-y plane. Bead probes are described in U.S. patent application Ser. No. 10/670,649, to Parker et al., entitled “Printed Circuit Board Test Access Point Structures and Method for Making the Same”, filed Sep. 24, 2003 and assigned to the assignee of interest herein, the entire disclosure of which is incorporated herein by reference for all that it teaches. Research has shown that bead probes may be fabricated along existing nets of the PCB design without impacting the PCB layout or high-speed electrical characteristics of the net, as reported in “A New Probing Technique for High-Speed/High Density Printed Circuit Boards”, International Test Conference, October 2004, the entire document of which is incorporated herein by reference for all that it teaches. Since bead probes may be added to PCB designs without requiring net re-routing, in principle, as previously described, any net having at least a portion of the net implemented in an exposed layer of the PCB (i.e., is implemented on an outer PCB layer that is accessible for probing) can have a bead probe placed anywhere along the exposed portion of the net provided that the fixture probe probing the bead probe will not strike a nearby component on the board or interfere with a nearby fixture probe. The number of potential probing locations on a given net can therefore be quite high, allowing a high degree of flexibility in choosing the locations to probe. The bead probes can be implemented as solder beads conductively connected directly to a trace, or can be implemented integral to the trace as merely thicker areas along the trace. This new bead probe technology facilitates the ease at which test pads can be added to the PCB design, and further enables fast and efficient implementation of multiple bead probes (or possible alternative probing locations) along each net of any significant length.
Therefore, with the ease, flexibility, and availability now offered by the new bead probe technology of implementing multiple alternative probing locations per almost any given net in a PCB design, the consideration of manipulating the probing location layout with a view to meeting the requirements of the fixture design of the tester fixture associated with the PCB design is now more feasible.